The present invention relates to a semiconductor component having, in, or on, a substrate and a dielectric layer provided on the substrate. The invention likewise relates to a corresponding fabrication method.
The term substrate is intended to be understood in the general sense and can therefore encompass both single-layer and multilayer substrates.
Although applicable to any desired semiconductor components, the present invention and the problem area on which it is based will be explained with regard to capacitors in silicon technology.
So-called one-transistor cells are used in dynamic random access memories (DRAMs). The cells comprise a storage capacitor and a selection transistor which connects the storage electrode to the bit line. The storage capacitor can be designed as a trench capacitor or as a stacked capacitor. The invention described here relates quite generally to capacitors for such DRAMs in the form of trench capacitors and stacked capacitors.
It is known to fabricate such a capacitor, e.g. for a DRAM (dynamic random access memory), with the construction electrode layer/insulator layer/electrode layer, in which case the electrode layers may be metal layers or (poly)silicon layers.
In order to further increase the storage density for future technology generations, the feature size is reduced from generation to generation. The ever decreasing capacitor area and the resultant decreasing capacitor capacitance lead to problems. Therefore, it is important for the capacitor capacitance at least to be kept constant despite a smaller feature size. This can be achieved, inter alia, by increasing the surface charge density of the storage capacitor.
Previously, this problem has been solved on the one hand by enlarging the available capacitor area (for a predetermined feature size). This can be achieved, e.g. by depositing polysilicon with a rough surface (xe2x80x9cHSGxe2x80x9d) in the trench or onto the bottom electrode of the stacked capacitor. On the other hand, the surface charge density has previously been increased by reducing the thickness of the dielectric. In this case, exclusively various combinations of SiO2 (silicon oxide) and Si3N4 (silicon nitride) have previously been used as dielectric for DRAM capacitors.
A few materials having a higher dielectric constant have furthermore been proposed for stacked capacitors. These explicitly include Ta2O5 and BST (barium strontium titanate). However, these materials are not thermostable in direct contact with silicon or polysilicon. Moreover, they are only inadequately thermostable.
An object of the present invention is to specify an improved semiconductor component and a corresponding fabrication method of the type mentioned in the introduction which yield a thermostable dielectric.
In a semiconductor component of the invention, a substrate is provided. A dielectric layer is provided on the substrate. The dielectric layer comprises a binary metal oxide.
In a method of the invention, a semiconductor component is fabricated by providing a substrate. A dielectric layer is provided on the substrate by first depositing a metal onto the substrate and then oxidizing the metal in a thermal process so that the dielectric layer comprises a binary metal oxide.
One of the exemplary embodiments of the invention is illustrated in the drawings and is explained in more detail in the description below.